Digital IC Design Engineer - Frontend / Backend / RTL / P&R / Place and Route

Digital IC Design Engineer - Frontend / Backend / RTL / P\&R / Place and Route

We're partnered with a well-funded and fast-growing deep‑tech startup in their search for Digital Design Engineers with strong expertise in RTL design, plus backend, Physical Implementation, Place and Route and Tapeout experience.

This organization is working on next‑generation high‑performance data converters and wireless communication ICs, using advanced nodes like 22FDX and FinFET.

They are open to mid-level (3–5 years) and senior‑level (6+ years) engineers who want to take ownership of their work and join a highly technical, collaborative team.

What You’ll Do

• Own RTL and micro‑architecture for key subsystems (DSP, control, interfaces)
• Develop and optimize backend flows (synthesis, floorplanning, P&R, STA, DRC, LVS)
• Collaborate across mixed‑signal and analog domains
• Participate in testbench creation and post‑silicon debug
• (Senior) Lead technical decisions and mentor juniors

Ideal Experience

• Fluent in SystemVerilog/VHDL, Python/Tcl, and EDA tools (Cadence, Synopsys, or Mentor)
• Hands‑on experience in 22FDX or FinFET technologies
• RTL‑GDS Flow experience including leading or at least contributing heavily to tape‑outs and the full ASIC flow
• Familiar with CDC, low‑power design, and hierarchical SoC
• Strong problem solver who thrives in independent, innovative environments

Why would you want to join?

• Competitive salary, equity (VESOP), and benefits
• High‑impact role in a pioneering team
• Flexible hybrid work setup with real autonomy

If this sounds interesting and you’d like to learn more, click the link below to apply or email me with a copy of your CV on

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