Lead Application Engineer

Overview

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Lead Application Engineer

Location: Munich, Germany

Reports to: Application Engineering Director

Overview

As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading-edge customers. With your expertise, you'll help them deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.

Responsibilities

• Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff
• Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
• Conduct technical presentations and product demonstrations
• Drive technical evaluations/benchmarks to success
• Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
• Drive adoption and proliferation of Cadence tools and technologies
• Amend and augment the flow as needed using Tcl/Python and/or other programming skills to meet objectives and improve results/flows
• Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements

Qualifications

• Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline
• 5+ years of industry Physical Design experience
• A working knowledge of UNIX/Linux, C-shell, TCL/TK programming and scripting
• A strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals and Static Timing Analysis is required
• Advanced nanometer implementation experience would be of a big advantage
• Excellent communication skills (fluent in English)
• Strong customer-facing communication and problem-solving skills
• A team player who is passionate about technology but also understands business requirements
• Experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus or Voltus is highly desired
• Experience in one and preferably more of the following disciplines:
  • Digital Circuit Implementation and signoff (place and route, static timing analysis, power analysis)
  • CAD support for Digital IC Design and related flows (including mixed-signal)
  • Logical, Timing and Physical Verification
  • Low Power techniques (1801, UPF & CPF standards)
  • Synthesis and DFT-insertion
  • FuSa architecture and implementation

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

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