Stellenbeschreibung:

Overview

Your mission

We are seeking an experienced Lead ASIC Architect to define and drive the architecture of our custom ASICs that control next-generation photonic integrated circuits (PICs). In this role you will be responsible for the high-level design of our ASIC ensuring it meets functional performance and integration requirements. You will lead technical specification interface definition and design strategy while managing and guiding an external ASIC design partner through development verification and tape-out.

This is a key leadership position at the intersection of photonics electronics and compute acceleration with direct impact on the performance and scalability of our photonic compute platform.

Responsibilities

• Define the architecture and system-level specifications of the ASIC used to control photonic integrated circuits.
• Own the end-to-end ASIC definition process including functional blocks interfaces clocking power domains and configuration flows.
• Collaborate with internal photonic systems and software teams to ensure tight integration of ASIC and PIC functionality.
• Manage and technically guide the external ASIC design partner throughout RTL development verification physical implementation and tape-out.
• Review and approve specifications design deliverables test plans and verification results from the external team.
• Identify architectural trade-offs in power area performance and complexity and make informed decisions.
• Define bring-up and test strategies in collaboration with firmware and hardware validation teams.
• Maintain clear project tracking timelines and risk management in the ASIC development lifecycle.
• Stay abreast of industry best practices and trends in mixed-signal and control ASICs for photonic and high-performance compute systems.

Required Qualifications

• Masters or PhD in Electrical Engineering Computer Engineering or related field.
• Proven experience (8 years) in ASIC architecture and design with successful tape-outs of complex mixed-signal or control ASICs.
• Deep understanding of digital and analog / mixed-signal ASIC design principles including RTL design verification and synthesis.
• Experience defining system-on-chip (SoC) architectures with multiple IP blocks interfaces and control logic.
• Familiarity with photonic systems high-speed I / O PLLs ADCs / DACs and power / thermal considerations.
• Strong leadership skills with experience managing or coordinating external design teams or vendors.
• Excellent communication skills and the ability to translate technical requirements across disciplines.

Preferred Qualifications

• Experience designing ASICs used in photonics optics or high-performance compute environments.
• Knowledge of hardware / software co-design embedded control loops or calibration algorithms for PICs.
• Experience with foundry interface PDK usage and tape-out logistics.
• Familiarity with EDA tools such as Synopsys Cadence or Mentor for digital and mixed-signal design flows.

Why us

• Make growing demand in compute and sustainability go hand in hand
• Work on leading edge photonic AI acceleration technologies.
• Collaborative and innovative work environment.
• Own your work from day one and fast-track your professional growth.
• Work alongside a passionate international cross-functional team of experts.
• Collaborate closely with the companys founders and core leadership team.

About us

Who we are and what we do

is a photonic deep-tech scale-up developing photonic processing solutions that compute natively with light and deliver a scalable alternative to transistor-based systems. Its Light Empowered Native Arithmetics (LENA) architecture delivers analog co-processing power optimised for complex computation and enabling energy-efficient performance for next-generation AI and HPC applications. operates its own Thin-Film Lithium Niobate (TFLN) chip pilot line in collaboration with the Institute for Microelectronics Stuttgart IMS CHIPS and is currently shipping its Native Processing Servers to selected partners. was founded by Michael Förtsch in 2018 and is headquartered in Stuttgart Germany.

Key Skills

Employment Type: Full-Time

Experience: years

Vacancy: 1

#J-18808-Ljbffr

NOTE / HINWEIS:

EN: Please refer to Fuchsjobs for the source of your application

DE: Bitte erwähne Fuchsjobs, als Quelle Deiner Bewerbung