Principal Engineer Testchip and PCM Design Methodology

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What if your ideas could change the way the world connects, powers up, or thinks?
As a Principal Engineer Testchip and PCM Design Methodology on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.
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Your Role
Key responsibilities in your new role

• Taking technical leadership of an international layout design team to support dynamic technology development and successful product tape outs at all stages of the layout process
• Owning the methodologies required to enable efficient, error-free, and industry-leading design of test chips and electrical process control monitors (PCM) across a wide range of technologies, extending down to 12nm
• Leveraging advanced automation technologies , including generative AI, to drive overall efficiency improvements while considering both local and global benefits
• Acting as a key interface between engineers, projects, and resource managers , with the ability to handle shifting priorities effectively
• Supporting the planning, execution, and tracking of high-quality and on-time layout deliveries for various projects
• Ensuring silicon-aware design with a strong focus on Design for Manufacturability (DfM) , as well as considerations for PCM, reliability, ESD , and related technical constraints

Your Profile
Qualifications and skills to help you succeed
You concentrate your creativity and knowledge on producing results with real added value. You clarify areas of responsibility, coordinate your work with colleagues, and regularly share your insights with them. You tackle change actively to reach your ambitious goals.

• Master degree or a PhD in Electrical Engineering, Physics or similar discipline
• At least 6 Years of experience in layout design with emphasis on design methodology and/or automation
• Solid programming background in SKILL and ate least one scripting language (Python, Ruby…) and working knowledge of Unix
• Experience in all areas of physical design with a deep understanding of DRC and LVS
• Creative thinking and "enabler" mentality
• Willingness to travel
• Excellent English communication skills and at least the willingness to learn German

Contact:
    Bruna Fernandes, LinkedIn

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