Synopsys Inc

ASIC Digital Design, Staff Engineer - Verification

Stellenbeschreibung:

Alternate Job Titles:

  • Staff RTL Design Engineer
  • Staff Digital Design Engineer
  • ASIC RTL Staff Engineer

We Are:

At Synopsys, we drive innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, leading in chip design, verification, and IP integration. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced RTL design engineer with a strong background in electronics or telecommunications. With over five years in ASIC or PHY IP development, you’re passionate about solving technical challenges, collaborating with cross-functional teams, and mentoring others. Your communication skills and attention to detail ensure projects run smoothly from specification to silicon debug. You thrive in fast-paced environments and are eager to contribute to groundbreaking technology.

What You’ll Be Doing:

  • Develop RTL specifications and architectures for High Bandwidth Interface PHY IP.
  • Define synthesis constraints and resolve STA and gate-level simulation issues.
  • Collaborate with verification, controller, and lab teams for design and debugging.
  • Support RTL to GDS flow during logic implementation.
  • Lead projects and train junior engineers.
  • Work with customers to resolve technical RTL issues.

The Impact You Will Have:

  • Deliver robust RTL designs for advanced silicon solutions.
  • Drive successful project completion and tape-outs.
  • Enhance design quality and verification efficiency.
  • Support customer success and strengthen Synopsys’ reputation.
  • Mentor and grow engineering talent within the team.
  • Contribute to digital flow improvements and innovation.

What You’ll Need:

  • BS/MS/PhD in Electronics Engineering or Telecommunications.
  • 5+ years of RTL design experience for ASIC or PHY IP.
  • Expertise in VCS, Verdi, Spyglass, and scripting (Perl, TCL, Python).
  • Knowledge of clock domain crossing, APB, JTAG protocols.
  • Strong English communication skills.

Who You Are:

  • Responsible, result-oriented, and self-motivated.
  • Collaborative and proactive problem solver.
  • Effective communicator and mentor.

The Team You’ll Be A Part Of:

Join a collaborative engineering team delivering innovative PHY IP solutions. Work alongside experts in Ho Chi Minh City, Da Nang, or Hanoi, and contribute to Synopsys’ global leadership in semiconductor technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about salary and benefits during the hiring process.

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Stelleninformationen

  • Veröffentlichungsdatum:

    18 Mär 2026
  • Standort:

    Berlin

    Einsatzort:

    Mountain View
  • Typ:

    Vollzeit
  • Arbeitsmodell:

    Vor Ort
  • Kategorie:

  • Erfahrung:

    2+ years
  • Arbeitsverhältnis:

    Angestellt

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