At Synopsys, we drive innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, leading in chip design, verification, and IP integration. Join us to transform the future through continuous technological innovation.
You are an experienced RTL design engineer with a strong background in electronics or telecommunications. With over five years in ASIC or PHY IP development, you’re passionate about solving technical challenges, collaborating with cross-functional teams, and mentoring others. Your communication skills and attention to detail ensure projects run smoothly from specification to silicon debug. You thrive in fast-paced environments and are eager to contribute to groundbreaking technology.
Join a collaborative engineering team delivering innovative PHY IP solutions. Work alongside experts in Ho Chi Minh City, Da Nang, or Hanoi, and contribute to Synopsys’ global leadership in semiconductor technology.
We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about salary and benefits during the hiring process.
#J-18808-LjbffrVeröffentlichungsdatum:
18 Mär 2026Standort:
BerlinEinsatzort:
Mountain ViewTyp:
VollzeitArbeitsmodell:
Vor OrtKategorie:
Erfahrung:
2+ yearsArbeitsverhältnis:
Angestellt
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