Role: IO Layout Design, Sr Engineer
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You are a dedicated and meticulous Layout Design Engineer with a passion for semiconductor technology. You thrive in a collaborative environment and are excited to work closely with global teams on the latest technology nodes. You have a strong understanding of semiconductor device physics and digital design, and you possess a solid foundation in CMOS fundamentals. Your familiarity with Unix/Shell/Python/TCL is an added advantage, and you are eager to leverage these skills to contribute to innovative projects. Your attention to detail and problem-solving abilities make you an ideal candidate for this role.
The Team You’ll Be A Part Of:
You’ll join a high-performing, globally distributed IP team that is at the forefront of automotive safety and reliability innovation. The team collaborates closely with product development, quality assurance, and customer engineering groups to deliver world-class automotive IP solutions. Together, you’ll champion functional safety standards, drive continuous improvement, and support customers in deploying safe, reliable automotive products.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#J-18808-LjbffrVeröffentlichungsdatum:
19 Mär 2026Standort:
BerlinEinsatzort:
Mountain ViewTyp:
VollzeitArbeitsmodell:
Vor OrtKategorie:
Erfahrung:
2+ yearsArbeitsverhältnis:
Angestellt
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