Renesas Electronics

NCG Engineer - Embedded Processing IC Development Division (f/m/d)

Stellenbeschreibung:

Job Description

As an NCG Engineer in Embedded Processing IC Development Division, you will work on the implementation, verification, and integration of RISC-based processor IP and SoC-level components. The role requires foundational digital design and verification skills and a strong willingness to grow into complex semiconductor development tasks. You will learn to operate within state-of-the-art EDA flows used across Renesas for processor, subsystem, and SoC programs.

Key Responsibilities (Technical Scope)

  • Digital Design & RTL Development: Contribute to module-level RTL implementation in Verilog or VHDL. Perform linting, CDC analysis, synthesis, and static timing analysis.
  • Verification & Validation: Develop and maintain SystemVerilog UVM-based testbenches, run regressions, analyze coverage, and debug functional issues.
  • Architecture & System Interaction: Apply RISC processor architecture knowledge and work with AMBA bus protocols (AXI/AHB/APB).
  • SoC / Subsystem Integration Support: Support front‑end and back‑end integration flows and assist with synthesis and timing analysis.
  • Tooling & Automation: Develop engineering automation using Perl, Python, or C++.
  • Software Interaction: Use ARM Assembler and C for test programs and bring‑up support.
  • Artificial Intelligence: Participate in AI development for new Engineering Workflows.

Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • Basic understanding of semiconductor development flows and RISC architectures.
  • Hands‑on experience with VHDL/Verilog, SystemVerilog UVM, linting, CDC, synthesis, and STA.
  • Programming skills in Perl, Python, and/or C++, plus embedded C and ARM Assembly.
  • Strong analytical skills, attention to detail, and effective written and verbal communication.
  • Fluent German and English.

Preferred Qualifications

  • Understanding of chip‑level integration methodologies (front‑end/back‑end).
  • AI‑based engineering automation or ML‑assisted development tools.

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Stelleninformationen

  • Veröffentlichungsdatum:

    20 Feb 2026
  • Standort:

    Düsseldorf
  • Typ:

    Vollzeit
  • Arbeitsmodell:

    Vor Ort
  • Kategorie:

  • Erfahrung:

    2+ years
  • Arbeitsverhältnis:

    Angestellt

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