Senior Backend Engineer – ASIC / Physical Design (all genders)

Overview

The Fraunhofer-Gesellschaft currently operates 75 institutes and research institutions throughout Germany and is the world’s leading applied research organization. Around 32 000 employees work with an annual research budget of 3.4 billion euros. The Fraunhofer Institute for Integrated Circuits IIS, located in Erlangen, is the largest institute of the Fraunhofer‑Gesellschaft with more than 1 200 employees.

Welcome to the Fraunhofer Institute for Integrated Circuits IIS, headquartered in Erlangen! As the largest institute within the Fraunhofer‑Gesellschaft, we have been conducting research for over 30 years in diverse fields such as artificial intelligence, microelectronics, sensor systems, data acquisition, signal processing, and signal transmission. Talented individuals from various engineering and natural science disciplines will find a wide range of exciting research topics under one roof. A few highlights that reflect our innovative strength include neuromorphic computing, 5G/6G mobile communication technologies, generative AI in speech and signal processing, and X‑ray imaging for e‑mobility. And that’s just the beginning! What sustainable solution will you find with us?

Here’s How You Will Make a Difference

In our »Integrated Circuits Back‑End« group, we work on a wide range of demanding projects in advanced technologies. We are responsible for the physical implementation and verification of complex integrated circuits and show industry partners how to realize future‑ready products - from classical ASICs to innovative chiplets.

To strengthen our development team, we are looking for an experienced Backend Engineer for digital implementation from RTL synthesis through Tape‑out . You will work on highly complex ASIC-, SoC- and Chiplet‑Designs and accompany them across the entire physical design flow.

Responsibilities

• Digital backend implementation: You own the RTL‑to‑GDSII (RTL2GDS) implementation for ASICs, SoCs, and chiplets and ensure sign‑off‑quality results.
• Physical Design und Timing Closure: You perform synthesis, floorplanning, place & route, Clock Tree Synthesis (CTS), and timing closure analyses, and optimize for performance, power, and area (PPA).
• Advanced Technologies: You work with state‑of‑the‑art technology nodes (e.g., FinFET, GAAFET).
• Interdisciplinary collaboration: You collaborate closely with frontend, DFT, and verification teams and actively contribute to the integration of complete system solutions.
• Tape‑out and quality assurance: You support the tape‑out process through design reviews, technical alignment, and structured documentation.

What You Bring To The Table

• A degree in electrical engineering, computer science, or a comparable qualification and at least 5 years of relevant professional experience in backend/physical design.
• Very good knowledge of the Cadence design flow (e.g., Genus, Innovus, Tempus) and Siemens EDA (Calibre).
• Solid experience with advanced technology nodes, which is a mandatory requirement for this role.
• Knowledge and hands‑on experience in Design for Test (DFT), e.g., scan, ATPG, or boundary scan, are preferred.
• Confident use of common EDA tools and scripting experience (e.g., Tcl, Python).
• A structured, analytical, and team‑oriented working style with a high degree of independence and quality awareness.
• Business‑fluent in English while German at A1 level is sufficient and can be developed further as needed.

What You Can Expect

• An exciting role: We offer a diverse and challenging field of work in an international environment, oriented toward state‑of‑the‑art research and technology.
• Room for creativity: Projects with strong practical components motivate our employees to drive innovation.
• Our colleagues enjoy our positive work culture: We are open‑minded, we help and trust each other.
• State‑of‑the‑art semiconductor projects: You will work on cutting‑edge, future‑oriented semiconductor projects and actively shape the development of modern ASIC, SoC, and Chiplet technologies.
• We value personal contact: With our structured onboarding process, you will quickly become familiar with our institute and be able to extend your network successfully.
• We take your needs seriously: We support your work‑life balance by offering flexible working hours and hybrid work.
• Your goals and interests are important to us: We offer ongoing professional and personal seminars, coaching, and language classes.

The position is initially limited to 2 years with the aim to extend it subsequently. The weekly working time is 39 hours. The position can also be filled part‑time, but as close to full‑time as possible.

We value and promote the diversity of our employees' skills and therefore welcome all applications – regardless of age, gender, nationality, ethnic and social origin, religion, ideology, disability, sexual orientation, and identity. Appointment, remuneration and social security benefits based on the public‑sector collective wage agreement (TVöD). Severely disabled persons are given preference in the event of equal suitability.

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps shape society now and in the future.

Ready to make a difference?

Apply online now and be part of our innovation journey! Once we’ve received your application, you will automatically receive a confirmation email. We will then get in touch as soon as possible to inform you about the next steps.

Do you have questions about the application process? Our recruiter Nina Wörlein will be happy to assist you.