Validate Ethernet physical layer hardware interface behavior: link negotiation, signal integrity, link state transitions and counters, optical transceiver operation.
Reproduce and root‑cause hardware and firmware defects through systematic test isolation at the PHY level.
Build and maintain lab test setups including optical and copper interfaces (OSFP, QSFP‑DD).
Analyze test failures, capture logs, and document defects with clear reproduction steps in the issue tracker.
Collaborate closely with hardware, software and application dev teams to triage failures and drive quality improvements.
Define and review long‑term, performance, and scalability test scenarios for physical‑layer components.
Derive test requirements from hardware validation reports and functional test specifications.
Contribute to CI/CD test integration for automated regression coverage of physical‑layer test suites.

Engineering profile: degree in electrical engineering, computer science or equivalent work experience.
Practical experience of hardware bring‑up and troubleshooting of high‑speed hardware interconnects.
Familiarity with test and measurement tools: protocol analyzers, oscilloscopes, BERT testers.
Experience and understanding of the Ethernet L1 Physical layer.
Understanding of the Ethernet L2 Data Link/MAC layer.
Experience with managed Ethernet transceivers.
Experience with Python scripting for API automation.
Fluent in English and German.
Deep knowledge of IEEE802.3, high‑speed Ethernet (100GE+) and transceivers, PCS/FEC constitutes an advantage.
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VIAVI Solutions GmbH