CPU Architect (Load-Store)

Requirements

• We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting
• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science (or equivalent experience)
• Strong understanding of computer architecture fundamentals, including memory hierarchy, cache coherence, and data prefetching
• Familiarity with performance modeling and simulation tools (e.g., Gem5, SimpleScalar, or similar)
• Basic knowledge of hardware description languages (e.g., Verilog, VHDL) and system-level programming (C, C++)
• Problem‑solving skills and ability to analyze complex system interactions
• Excellent communication and teamwork abilities
• Hands‑on experience with performance profiling tools and benchmarking methodologies
• Exposure to parallel processing architectures and multi‑core systems
• Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee informationand/or documentation will be required and considered as Tenstorrent moves through the employment process

What the job involves

• We are seeking a highly motivated and passionate CPU Architect to join our processor architecture team, focusing on the CPU’s load‑store unit
• In this role, you will contribute to the design, analysis, and optimization of cutting‑edge CPU architectures with an emphasis on a high‑performance load‑store unit
• This is an excellent opportunity to work alongside world‑class architects in high‑performance computing and processor design
• Drive the architecture, micro‑architecture, design and optimization of the CPU load‑store unit for Tenstorrent’s high‑performance out‑of‑order RISCV CPUs
• Propose new implementations to optimize load‑store PPA
• Perform simulations, modeling, and performance analysis of advanced CPU features and state‑of‑the‑art data prefetchers
• Collaborate with hardware and software teams to optimize memory access patterns and system performance
• Stay up to date with industry trends and emerging technologies in CPU architecture and the memory subsystem
• Support documentation and presentation of architectural decisions, trade‑offs, and findings