Digital Design Verification Engineer (m/f/d)

Do you share our passion for innovation and technology and want to tackle the challenges of the future? Then join FERCHAU: As someone ambitious who, like us, wants to take technology to the next level. We are involved in exciting projects for well-known customers in the aerospace industry and take on responsibility for complex development projects. As a career-starter or an experienced professional, you will support your colleagues with your knowledge and expertise.

Digital Design Verification Engineer (m/f/d)

This will be your future job

• FPGA design, implementation and definition of constraints for the defence sector
• Definition and development of simulation tools for verification
• Definition of requirements and tracing
• Functional check of pre and post layout (definition of verification plan, testbench coding, test execution and report drafting)
• Design documentation according to internal and normative standards
• Formal verification of FPGA designs (timing analysis, code coverage, coding rule check)

Your benefits at FERCHAU

• Fascinating and pioneering development of technological solutions for defense and security in the aerospace industry
• The opportunity to further develop yourself in a talented and international team
• Excellent capacity to balance your personal, family and professional commitments with flexible working time models and up to 2 mobile working days each week
• Plentiful career opportunities within our team: individual professional development in various soft and hard skills at several institutes, as well as ready-made technical career paths for long-term development prospects
• Numerous additional benefits through our GVP collective agreement including corporate benefits, as well as regular team and sports events to support a healthy work-life balance

Your profile

• Completed degree in electrical engineering, communications engineering, technical computer science or a comparable field of study
• FPGA design or verification experience is an advantage
• Knowledge of VHDL and/ or Verilog
• Experience in design and simulation tools Mentor as Model Sim or HDL Author preferred
• Knowledge in Scripting language like Tcl or Python
• Very good English skills, German is an advantage
• Interdisciplinary mindset and team spirit