Layout Engineer (f/m/d)

As a Layout Engineer, you will develop and maintain layout infrastructure for photonic integrated circuits, translating designs into fabrication-ready layouts and shaping new design rules and verification flows. You’ll partner with designers to produce layouts, run DRC/LVS checks, and resolve fabrication issues. The role supports the mask flow from device layout to data preparation, enabling scalable, reliable photonic IC production. This is a chance to contribute to a graphene-based platform that connects chips with energy-efficient networks.

• comprehensive benefits package
• outstanding insurance
• pension
• virtual stock options

• Maintain and evolve layout libraries and workflows in Synopsys
• Assist designers in generating layouts for photonic devices and circuits
• Run DRC and LVS checks and address violations
• Investigate off-grid errors and layout issues and implement fixes
• Develop and implement new design rules
• Assemble and prepare layouts for fabrication
• Support the mask flow from layout to mask data preparation

• Degree in Physics, Electrical Engineering, Photonics, or related technical field
• Strong Python programming skills
• Understanding of IC design; knowledge of photonic ICs is a plus
• Experience with photonic or electronic layout software (ideally Synopsys OptoCompiler)
• Experience with physical verification tools (ideally Synopsys IC Validator)
• Experience using KLayout
• Familiarity with DRC, LVS and mask-data preparation

• strong problem-solving abilities
• team collaboration
• excellent attention to detail
• Python
• Synopsys OptoCompiler
• Synopsys IC Validator