Principal AMS Verification Engineer (m/f/d)

Principal AMS Verification Engineer: Performing complex SOC verification for digital/analog/FW design with an accent on verification plan quality and test case development. Focus on ensuring complex SoC verification functional coverage and quality.

Location: Caen, Sophia-Antipolis (Valbonne), Toulouse

Salary: Besides a competitive salary, you will be eligible for our bonus plan and receive lunch vouchers, a higher than average number of vacation days and the possibility to buy company shares with a 15% discount.

What you will do

• Work with global design teams to do complex SOC verification for digital/analog/FW design.
• Be responsible for verification plan quality, verification result/design target cross-check.
• Develop test cases to reach better coverage and verification quality.
• Co-work with functional verification team to ensure complex SoC verification functional coverage and quality.

Requirements

• 5+ years of hands‑on experience in Chip‑Level AMS Verification on medium‑complex designs.
• Specific knowledge about writing an exhaustive Top‑Level AMS verification plan and setting up an AMS flow.
• Knowledge of the Analog and Digital Design Flows, with hands‑on experience on at least one of the two.
• Knowledge of the Cadence AMS suite.
• Scripting/Language skills: C/C++, Bash, Python, Verilog / VerilogAMS, System‑Verilog, Tcl, WREAL.
• Ability to visually inspect analog circuits and/or digital blocks to grasp their main functionalities.

Nice to have

• Knowledge of Cadence Virtuoso/Spectre, vManager, vPlan.
• Familiarity with revision control software (e.g. DesignSync, SVN).

Benefits

• Fulltime position with a permanent contract.
• We have a work from home policy and many more benefits.
• Online and offline learning opportunities to help you develop some of your core and professional skills.
• We aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind.