Principal Engineer-Analog Design RF

As an experienced RFIC Design Engineer in Microchip’s Wireless IP Design Group, you will design critical RF blocks for Bluetooth, Wi‑Fi, and UWB across a cross‑functional team. You drive schematic design, simulation, and layout collaboration to meet performance and power targets, while validating silicon and debugging issues through lab measurements. Your work supports scalable wireless solutions in a globally renowned organization that values innovation, diversity, and growth. This role offers meaningful impact in cutting‑edge RF CMOS tech and product‑level tape-out readiness.

• Design RFIC blocks and modules (RF Synthesizer, VCO, LO generation, TX/RX chains, baseband blocks, biasing)
• Own schematic design and simulation to meet performance, area, and power targets
• Lead and review layout coordination with floor planning, matching, routing, shielding, and ESD strategies
• Translate system requirements into block-level budgets and circuit specifications
• Supervise validation and debug including lab bring‑up, measurements, and root-cause analysis
• Collaborate with foundry teams to utilize PDKs and models and understand reliability constraints

• Ph.D. in Electrical Engineering with 5+ years in RF/Analog CMOS IC design, or M.S. with 7.5+ years
• Experience in RF TX/RX chain design and/or RF PLL/Synthesizer design
• Deep understanding of RF-Analog IC design and tape-out experience
• Knowledge of CMOS transistor and inductor physics, parasitics, and matching networks
• Layout and packaging effects on circuit performance including parasitics and noise coupling
• RF test and debug experience with lab equipment (spectrum analyzers, network analyzers, oscilloscopes)
• Proficiency with Cadence Virtuoso, Spectre/SpectreRF, PeakView or similar EM tools

• collaboration in a cross-functional, global team
• troubleshooting and problem-solving
• clear communication and documentation
• RFIC design
• RF TX/RX chain design
• PLL/Synthesizer design