As Principal Engineer, you will shape compact models for high-voltage devices in Si and SiC, enabling accurate electro-thermal representations. You will align modeling strategies with cross-functional teams and drive novel methodologies for convergence and portability across sim tools. You will translate Verilog-A models to SPICE and back, advancing the state-of-the-art in device modeling. This role offers impact through collaboration with Infineon's compact modeling community and external coalitions, influencing how simulations inform design decisions.
VerantwortungsbereicheVeröffentlichungsdatum:
24 Sep 2026Standort:
MünchenEinsatzort:
Dresden, GermanyTyp:
VollzeitArbeitsmodell:
Vor OrtKategorie:
Erfahrung:
2+ yearsArbeitsverhältnis:
Angestellt
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