Senior Layout Application Engineer

Stellenbeschreibung:

Overview

At PDF Solutions, we are at the forefront of revolutionizing the semiconductor industry. Our cutting‑edge technologies and data‑driven solutions empower semiconductor manufacturers to achieve unprecedented levels of efficiency, quality, and innovation. By joining our team, you'll have the opportunity to work with some of the brightest minds in the industry, tackle complex challenges, and contribute to groundbreaking advancements that shape the future of technology. Headquartered in Santa Clara, California, PDF Solutions also operates worldwide in Canada, China, France, Germany, Italy, Japan, Korea, and Taiwan.

Among the products of PDF Solutions is eprobe, an electron beam inspection machine with unique capabilities. This machine especially benefits from layout information for quality and throughput. The task is to apply the in‑house PDF layout software to extract the information needed by eprobe, ranging from simply running existing setups to make modifications, checking correctness of the results and optimizing w.r.t. throughput goals.

Responsibilities

  • Installation, setup and maintenance of the software
  • Gathering information from customers on their needs
  • Contribute to customer presentations
  • Translate abstract descriptions of geometries into software configurations/scripts
  • For new software configuration, design test cases and run tests to make sure it works as intended
  • Setup job runs and supervise them
  • Troubleshooting problems with software and create fixes/workarounds

Qualifications

  • Bachelor degree or higher in computer science, electrical engineering, physics or similar
  • Knowledge of computer systems
  • Communication skills for interaction with clients as well as internal engineers (English language)
  • Attentiveness to detail to ensure all parts of an application come together and work as intended
  • Working global hours (if needed) and ability to travel (occasionally)

Nice to Have

  • Problem‑solving skills
  • Good geometrical understanding
  • Experience with state‑of‑the‑art semiconductor layouts

Pay Range

EUR €70,000.00 - EUR €110,000.00 /Yr.

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Stelleninformationen

  • Veröffentlichungsdatum:

    20 Jul 2026
  • Standort:

    München
  • Typ:

    Vollzeit
  • Arbeitsmodell:

    Vor Ort
  • Kategorie:

  • Erfahrung:

    2+ years
  • Arbeitsverhältnis:

    Angestellt

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