Senior Staff Engineer Physical Design and Methodology (f/m/div)

Stellenbeschreibung:

Overview

As a Senior Staff SOC Implementation, you shape advanced digital design flows for complex SoCs and collaborate across cross-functional teams to enable robust timing, sign-off, and power planning. You’ll push the RTL2GDS flow from synthesis to physical implementation, driving innovative clocking and floorplanning strategies at sub-14nm scales. Your work directly supports Infineon’s mission to enable greener, smarter energy and digitalization. This role offers high-impact, hands-on leadership in a global R&D context with global influence.

Verantwortungsbereiche

Develop and implement digital design flows for physical design (floorplanning, placement, clock trees, routing, power distribution)
Translate high-level requirements into detailed flow specs using state-of-the-art EDA tools to ensure timing, signal integrity, and physical sign-off
Work across RTL2GDS flow (synthesis, equivalence checking, physical implementation) to create automated, reliable, customizable flows
Develop clocking architectures considering deep sub-micron physical limitations and collaborate across functions to overcome challenges
Participate in an expert network to advance SoC floor planning and top-level timing closure initiatives

Zentrale Anforderungen

degree in Electrical Engineering, Microelectronics, or a similar field
5+ years of Physical Design experience with highly complex SoCs; strong background in Synthesis, Place & Route, Timing Closure; FINFET technologies
Strong knowledge of Synopsys and Cadence Toolsets in RTL2GDS
proven track record in developing digital design methodologies
technical leadership in physical design projects
programming skills in Tcl or Python
basic RTL coding and Object Oriented Programming (OOP)
understanding of Functional Safety and Agile methodologies (Kanban, Scrum, XP); Test-Driven Development is a plus
excellent written and spoken English