Senior System Architect – Ethernet PHY & High-Speed Interconnect (m/f/d)

As a Senior System Architect, you drive end-to-end PHY system design and strategic decisions for next-gen Ethernet technologies at ANTL in Munich. You translate complex system behavior into scalable architectural solutions, shaping future products and industry standards. You will lead cross-disciplinary trade-off studies, assess modeling results, and contribute to standards discussions. This role combines deep technical analysis with long-term technology strategy in a high-impact research environment.

• healthy meals in company canteen
• broad range of training opportunities (online and on-site)
• language courses in German and Mandarin
• international collaboration opportunities
• diverse and international work environment
• self-responsible work in a growing team

• Define end-to-end PHY system models for architecture decisions, including channel behavior, TX/RX impairments, and data-converter constraints
• Lead architecture trade-off studies across performance, power, bandwidth, BER, latency, and feasibility
• Evaluate equalization and signal processing under hardware impairments
• Translate simulation and impairment analysis into actionable architectural recommendations
• Define system-level constraints and performance budgets for future Ethernet PHY architectures
• Monitor and analyze IEEE 802.3, UEC, OIF, and MSA standards activities to identify innovation opportunities
• Shape technical positions and contribute to industry standards discussions with robust analysis
• Provide technical leadership and mentorship to engineers across multidisciplinary teams
• Collaborate with universities, research institutes, and external partners to influence PHY concepts

• Master's degree in Electrical Engineering, Electronic Engineering, Computer Science or related discipline
• Strong experience with high-speed PHY, SerDes system or wireline communication system architecture
• Solid understanding of Ethernet PHY architecture including channel modelling, equalization, jitter, noise analysis, and system-level data converter impact on link performance
• Proficiency in Python, MATLAB or similar system-level simulation environments for architecture exploration
• Ability to abstract complex physical phenomena into actionable system models and trade-offs
• Proven ability to make architecture decisions under technical uncertainty and communicate assumptions, risks, and trade-offs clearly
• Excellent communication and collaboration skills in international environments
• Full professional proficiency in English

• excellent communication
• collaboration
• mentorship
• high-speed PHY
• SerDes system/architecture
• channel modelling