Infineon Technologies

Staff Engineer Digital Design (f/m/div)

Stellenbeschreibung:

Overview

As a Staff Engineer Digital Design on Infineon’s R&D team, you will shape the digital design of non-volatile memories for automotive applications. You’ll work closely with fellow engineers across hardware, verification, and firmware to deliver verified IP that meets safety and security requirements. You will drive architectural decisions and implement innovative blocks using modern design techniques. You’ll operate in a fast-paced, collaborative environment, contributing to cutting-edge automotive memory technology and power/IoT solutions. This role offers a chance to influence the microarchitecture and tooling stack while supporting Infineon’s mission toward safer, greener mobility.

Verantwortungsbereiche
  • Implement and/or review subblocks of non-volatile memories (NVM)
  • Contribute to the specification and definition of the microarchitecture of NVM for automotive applications
  • Ensure digital design meets functional safety and security requirements
  • Drive technical decisions for the functional area and execute implementation
  • Collaborate with hard macro designers, verification engineers, digital design engineers, and firmware engineers to deliver verified IP solutions
  • Create innovative architectures using the latest design techniques and tools
  • Run logic synthesis and conduct design verification activities (linting, CDC analysis, RDC analysis)
Zentrale Anforderungen
  • A degree in Electrical Engineering, Computer Engineering, or a related field
  • At least 4 years of relevant experience in defining and implementing digital circuits and functionalities
  • Experience with digital design flow including RTL and gate-level simulation, linting, logic synthesis, STA, UPF (low-power design), and DfT
  • Proficiency in SystemVerilog or VHDL
  • Strong knowledge of C and scripting languages such as Perl or Python
  • Fluency in English (mandatory)
  • NVM and automotive memory architectures
  • Digital design flow: RTL, gate-level sim, linting, synthesis, STA, UPF, DfT
  • SystemVerilog or VHDL
  • C, Perl, Python
  • Functional safety and security considerations in digital design
  • Collaboration across multi-disciplinary teams
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Stelleninformationen

  • Veröffentlichungsdatum:

    02 Okt 2026
  • Standort:

    München

    Einsatzort:

    Dresden, Germany
  • Typ:

    Vollzeit
  • Arbeitsmodell:

    Vor Ort
  • Kategorie:

  • Erfahrung:

    2+ years
  • Arbeitsverhältnis:

    Angestellt

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