Mixed Signal Design Engineer - Data Converters / DAC / ADC

Mixed Signal Design Engineer – Data Converters / DAC / ADC

European Tech Recruit are working closely with an exciting semiconductor startup based in Aachen, looking for a talented Mixed Signal Design Engineer with experience in Data Converters / DAC / ADC to join their team.

In this role you will be involved in the complete development cycle—from specification and architecture to silicon validation—working at the forefront of data converter technology in advanced CMOS processes such as 22FDX and other FinFET/FD‑SOI processes.

Responsibilities

• Solid understanding of ADC/DAC architectures, performance metrics, design trade‑offs, and criteria for selecting suitable designs for different applications.
• Experience building measurement sub‑systems such as band‑gaps, CMOS bias generators, TIAs, op‑amps, filters, switched‑cap circuits, LDOs, ADCs, etc.
• Hands‑on experience with EDA tools such as Cadence Virtuoso, with a history of successful tape‑outs.
• Develop behavioral models and conduct architecture‑level trade‑off analysis.
• Expertise in high‑precision design techniques in the presence of large device mismatch and high supply noise.
• Collaborate closely with layout engineers to ensure layout matching and parasitic‑aware design.
• Experience in C / MATLAB / Verilog modeling.
• Support silicon bring‑up, lab validation, and debugging of first silicon.
• Document design and verification results, and support IP integration into customer products.

Requirements

• M.Sc. or Ph.D. in Electrical Engineering or related field.
• 10+ years of industry experience in mixed‑signal IC design, particularly ADC/DAC circuits.
• Experience with 16 nm and below technology nodes.
• Strong understanding of analog design fundamentals (noise, matching, linearity, stability).
• Knowledge of system‑level integration and SoC interfacing.
• Proficiency with Cadence design tools, Spectre, and behavioral modeling (Verilog‑A, SystemVerilog‑AMS).
• Full‑custom analog layout techniques and ability to perform layout extraction, verification, and sign‑off.
• Experience with advanced CMOS process nodes.
• Excellent communication skills and ability to work collaboratively.

If this role is of any interest please apply directly on LinkedIn or send a copy of your CV to

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