Principal Engineer – Modelling & Verification of Analog Mixed-Signal Systems

Huawei's Heisenberg Research Center is responsible for advanced technology research, architectural development, design and strategic engineering of our products.

We are a chip platform team in Munich research center. We keep growing together with our continuous business success and strong partnership, and welcome all excellent experts and talents to join us.

Principal Engineer – Modelling & Verification of Analog Mixed‑Signal Systems

Your mission

• Spearhead Development: Lead the end‑to‑end modelling and verification of complex analog and mixed‑signal blocks—such as SerDes, sensor interfaces, PLLs, CTLEs—from concept through sign‑off.
• Strategy & Optimization: Define, implement, and continuously improve system‑level modelling strategies for accuracy, speed, and coverage.
• Cross‑Functional Collaboration: Work closely with both analog and digital design teams to drive model development, ensure seamless integration, and enable comprehensive test generation.
• Research & Innovation: Stay at the forefront of advances in modelling and verification, and contribute to the technical community through patents, conference papers, and internal or external publications.
• Mentorship & Technical Leadership: Guide and support junior engineers, fostering a culture of technical excellence and continuous learning.
• Project Leadership: Manage priorities across multiple ongoing projects, proactively resolving technical and organisational challenges to meet deliverables.
• Global Engagement: Communicate and collaborate with multicultural, multidisciplinary teams—sometimes across multiple partner organisations and locations.

Your areas of expertise

• Education: Master's or PhD in Electrical/Electronics Engineering or a closely related discipline.
• Professional Experience: Several years of hands‑on experience in analog modelling, high‑speed interface development, and AMS IP verification—especially with Ethernet, SerDes, DDR, sensor interfaces, PLL, CTLE, and related circuits.
• Technical Expertise: Deep understanding of interface architectures (channel equalisation, CDR, etc.) and system‑level AMS modelling; proficient in SPICE, Python, and other industry‑standard simulation tools; SystemC‑AMS or equivalent expertise is a significant advantage.
• Analytical Skills: Proven ability to solve complex technical problems, optimise verification strategies, and drive innovation.
• Communication: Fluent in written and spoken English; demonstrated intercultural and interpersonal skills, including experience working in global and multidisciplinary teams.
• Leadership: Experience leading project teams and mentoring engineers; strong organisational and time‑management skills; ability to handle multiple priorities.
• Mobility: Willingness to travel as required for cross‑site collaboration and project needs.

Your rewards of working here

• Our culture is characterised by innovative power and team spirit as well as the intensive exchange of knowledge and experience within our global network.
• We offer healthy meals ranging from traditional Chinese to western delicacies in our famous company canteen.
• Continual development opportunities: broad range of training programmes—including language courses in German and Mandarin.
• Diverse and welcoming environment shaped by various backgrounds and around 40 nationalities.
• Self‑responsible work in a competent, motivated and constantly growing team.