Senior Staff Application Engineer for Circuit Simulation (f/m/div)

As a Senior Staff Application Engineer for Circuit Simulation on our Research & Development team, you will merge creativity with technical expertise to shape the future of technology, drive groundbreaking projects, and bring new ideas to life.

Responsibilities

• Support and rollout the analog and mixed‑signal circuit simulator in Infineon
• Develop the methodology around circuit simulator applications and drive it into productive use in Infineon’s design flow
• Execute existing and develop new trainings for the design and verification community at Infineon
• Act as bridge between internal design and verification community and the circuit simulator developers
• Support the product owner in gathering, prioritizing and refining community requirements
• In the best case also implement features in the simulator from time to time

Qualifications

• Degree in Electrical Engineering, Electronics, Software Development or related area
• +5 years experience in the development of integrated circuits as Analog/Mixed‑Signal Design or Verification Engineer
• Proficient in the usage of analog circuit simulators such as Cadence Spectre, Synopsys HSPICE or Siemens EDA Solido SPICE
• Experience in the usage and adaption of the Cadence EDA environment
• Experience in the usage, supporting and rolling out methodologies or tools in a productive EDA environment such as Cadence Virtuoso/Maestro
• Nice‑to‑have: experience in using behavioral languages such as Verilog‑A, Verilog/SystemVerilog or SystemC
• Experience in software development in python, SKILL or C/C++
• English language skills with German being a plus

Contact

Darana Andrade

EEO Statement

We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to giving all applicants and employees equal opportunities.