PCIE SOC Application Engineer (Sr Staff)

As a Sr Staff PCIE SOC Application Engineer at Synopsys, you enable customers to integrate PCIe and SerDes IP into complex ASIC/SoC designs. You will partner with cross‑functional teams to resolve integration challenges, guide silicon bring‑up, and share best practices that accelerate product timelines. You’ll balance deep technical troubleshooting with clear customer communication, shaping adoption of Synopsys IP across global sites. This role offers impact across AI, 5G, automotive, and consumer applications within a collaborative, innovation‑driven culture. You will be at the forefront of next‑gen silicon solutions, driving trusted partnerships and industry leadership.

• health benefits
• wellness programs
• financial benefits
• total rewards package
• salary range discussed during hiring
• multisite collaboration

• Provide technical guidance and hands‑on support for integrating PCIe and High Speed SerDes IP into ASIC/SoC designs
• Conduct integration reviews at customer milestones and troubleshoot complex integration issues
• Collaborate with customers to resolve RTL simulation, synthesis, floorplanning, timing closure, and silicon bring‑up issues
• Support silicon bring‑up and system‑level characterization in customer environments
• Document best practices, create application notes, and deliver customer training
• Participate in cross‑functional teams to relay feedback and contribute to product improvements
• Travel occasionally to customer sites for on‑site support, integration reviews, and system bring‑up

• 10+ years in IP design, ASIC/SoC integration, or related customer‑facing engineering roles
• Strong understanding of ASIC design flows: simulation/verification, RTL synthesis, floorplanning, physical design, timing closure
• Hands‑on experience with High Speed SerDes IPs for PCIe, USB, SATA
• RTL and gate‑level simulation debugging; familiarity with Design Compiler, Fusion Compiler, PrimeTime
• Experience with silicon bring‑up and system‑level characterization
• Domain knowledge of PCI Express and SERDES and their implementation flows
• Excellent communication, organizational skills, and customer‑focused mindset

• Excellent communicator
• Organized and detail‑oriented
• Resourceful problem‑solver
• PCIe and High Speed SerDes IP integration
• RTL and gate‑level simulation debugging
• Design Compiler, Fusion Compiler, PrimeTime